The present invention relates to a method for chemically and mechanically polishing and processing thin films formed on a surface of a substrate of a semiconductor device by using a polishing member.
In the manufacturing process of highly integrated semiconductor devices such as DRAMs (Dynamic Random Access Memories) or the like having a density of not less than 256 megabits, fine patterns of a minimum dimension of not more than 0.2 xcexcm are often formed. In order to form such fine patterns at a high precision using photolithography, decrease in the wavelength of exposing light and increase in the number of apertures are required. Accordingly, the allowable focal depth of reduction projection exposure equipment used in the photolithographic process becomes shallow. In order to expose and transfer a fine circuit pattern onto a photosensitive film (photoresist film) on a thin film formed on the surface of a substrate at a high resolution using the photolithographic process, the flatness of the surface of the photosensitive film, which is the surface to be exposed, must be not more than 0.3 xcexcm.
As a method for obtaining the flat property of the surface of a photosensitive film, JP-A-7-314298 specification discloses a reflow planarizing method, in which an insulating film used as the base to form a photosensitive film is softened by heating for allowing the insulating film to reflow. Furthermore, there are known such an etching method for melting and flattening a convex part of the insulating film and chemical mechanical polishing (CMP) method, in which insulating films are polished chemically and mechanically using slurry and a polishing pad, the slurry comprising a processing liquid in which powder or grinding grains are contained.
Also, a method in which when a wafer contacts a retainer, the entire retainer deforms in accordance with the change in shape of the wafer, is known, such as the method disclosed in JP-A-11-277417 specification.
Although conventional reflow planarizing or etching methods can locally planarize stepped portions, they have a problem in that flatness to satisfy the shallow allowable focal depth of exposure equipment throughout a wide area (not less than 30 mm in diameter) of a semiconductor substrate. On the other hand, conventional chemical and mechanical polishing gives better flatness than a reflow planarizing method. However, since the conventional chemical and mechanical polishing method polishes the surface of the substrate by pushing the surface of the thin film formed on the surface of a substrate against a flexible polishing cloth, which is a polishing member, (e.g. a polyurethane polishing pad of a modulus of longitudinal elasticity of not more than 1,000 kg/cm2), this method has a problem in that the polishing cloth is deformed non-uniformly by the pushing force of the surface of the substrate, and the flatness after processing is lowered. For example, as JP-A-9-267257 specification and JP-A-10-286758 specification disclose, the polishing cloth in the vicinity of the circumference of the substrate is caved or waved by the pushing force of the substrate, so that polishing properties of the circumferential surface of the substrate became non-uniform to thereby cause, so-called, edge sagging phenomenon.
The larger the pushing force of the substrate against the polishing member, that is, the higher the processing surface pressure, the worse the flatness of the surface of the substrate after processing. If the processing surface pressure is lowered to reduce the phenomenon of worsened flatness, the problem of the drop in polishing efficiency to thereby increase processing time and thus lower the throughput thereof was caused.
On the other hand, JP-A-9-232260 specification discloses a method for processing the surface of a substrate using a grinding stone which is manufactured by binding grinding grains for polishing with a resin (binded grinding grain disk), instead of using abrasives and abrasive cloth. Since the grinding stone is more rigid than abrasive cloth (e.g. the modulus of longitudinal elasticity of not less than 5,000 kg/cm2), the flatness of the surface of the substrate in non-uniform circuit pattern areas is improved, but non-uniform polishing properties of the outer circumferential surface of the substrate, that is, so-called edge sagging phenomenon could not have been solved.
Also, JP-A-6-155286 specification and JP-A-9-117860 specification disclose methods for preventing the wafer from approaching the polishing member side by providing an inclined surface on the structure body of the inner wall surface of the guide provided on the outer circumference of the wafer, or preventing the wafer from getting out of an inside of a guide and preventing the excessive polishing of the other circumferential end portion of the wafer. In these prior arts, however, the outer circumference end of the wafer goes up and down an inclined plane of the guide due to the variation of thrust applied thereto, and the excessive movement to the opposite side to the polishing member can not be prevented. Accordingly, since the ability of controlling the position and maintaining the contact of the outer circumference of the wafer is not satisfactory, non-uniform polishing properties of the outer circumferential surface of the substrate, that is, so-called edge sagging phenomenon could not have been solved, when grindstone that is more rigid than abrasive cloth is used as a polishing member.
Furthermore, JP-A-10-315125 specification discloses a method for aiming uniform polishing by changing load applied to the back surface of the wafer between the inner area and the outer area. In this method, since taking measures to meet against the thrust generated from the load and the friction coefficient cannot be performed, non-uniform polishing properties of the outer circumferential surface area of the substrate, that is, so-called edge sagging phenomenon could not have been solved, when rigid grindstone is used as a polishing member.
The inventors of the present invention had experimentally for the first time found a phenomenon that the deformation of grindstone as used for a polishing member does not occur when using the grindstone having a high-rigidity surface, but that the substrate is deformed when it is pushed against the guide of the carrier by the thrust generated in the direction of the substrate surface due to the load when polishing and friction. It was newly found that this phenomenon causes non-uniform polishing properties of the outer circumferential surface area of the substrate, that is,, so-called edge sagging phenomenon.
FIGS. 7 and 8 are schematic view showing prior art techniques for polishing substrates using grindstones.
FIG. 7 is a schematic view of a wafer 2 and a guide 83 pushed against the surface of a grindstone 1, when viewed from above. In order to accommodate the dimensional tolerance of the outer diameter of the wafer 2, and to facilitate attaching to or detaching from the carrier (not shown) in automatically conveying the wafer, the inner diameter of the guide 83 is normally made to be about 1 mm larger than the outer diameter of the wafer 2. As a result, the gap 10 is produced between an inner wall of the guide 83 and the outer circumference of the wafer 2. The grindstone surface 1 rotates in the direction of the arrow 4, while the wafer 2 and the guide 83 rotate in the direction of the arrow 5 with they being integrated with the carrier. A friction force by polishing Fp is applied to the surface of the wafer 2, due to two relative motions whose diameters and the centers of rotation are different from each other. The wafer 2 is held in the carrier by an elastic member (not shown) so as to generate a holding force Fc. The wafer 2 moves within an area defined by an inner wall of the guide 83 by the difference in force between the friction force by polishing Fp and the holding force Fc, and pushes the wafer 2 against the inner wall of the guide 83 so as to generate a reaction force Fg. Since the outer diameter of the wafer 2 is smaller than the inner diameter of the guide 83, the pushed outer circumference of the wafer 2 cannot contact with the inner wall of the guide 83 by the entire outer circumference thereof, but contacts at a point with the inner wall of the guide 83. As a result, the reaction force Fg to the wafer 2 is concentrated in this point. The equilibrium relationship between the above-mentioned forces in the direction of the surface of the wafer 2 is Fp=Fg+Fc.
FIGS. 8A and 8B are schematic views showing an enlarged sectional side view and a characteristic graph showing the polishing rate in the vicinity of the outer circumferential end portion on the diameter of the wafer. The abscissa axis of the characteristic graph shows the position on the diameter of the wafer, with 0 being the center, positive values being the right side of the center, and negative values being the left side of the center. In the present invention, the graph shows the data for the left half when a wafer having a diameter of 200 mm is used. The ordinate axis shows the relative polishing rate indicated by relative values standardized by the mean polishing rate in the vicinity of the center area of the wafer. Since the position and the size of the point of inflection of characteristic curves are varied by polishing conditions, the graph of the present invention shows only an example of thereof.
A polishing load Pb is applied to the back surface of the wafer 2 through an elastic member 6, and the thin film 87 on the surface of the wafer 2 is pushed against the grindstone surface 1. A polishing liquid 88 intervenes between the thin film and the grindstone surface 1. A polishing friction force Fp, determined by the product of the friction coefficient xcexcp between the thin film 87 on the surface of the wafer and the grindstone surface 1, and the polishing load Pb is generated (Fp=Pbxc3x97xcexcp), so that thrust is applied to the wafer 2 in the direction of the rotation of the grindstone. The thus polishing friction force Fp which is applied to the wafer balances with the retaining force Fc, determined by the product of the friction coefficient xcexcw between the elastic member 6 and the back surface of the wafer, and the polishing load Pb (Fc=Pbxc3x97xcexcw) and the reaction force Fg from the guide 89. When the prior art technique is used, in the wafer 2 as thin as about not more than 1 mm, the reaction force Fg caused local deformations 91 or 92 in the outer circumferential area of the substrate about 30 mm from the outer circumferential end of the wafer.
FIG. 8A shows the case where the outer circumferential end portion 90 of the wafer has been deformed in such a way that it is pushed against the surface of the grindstone, in which the relative polishing rate of the portion 93 of the polishing rate curve on the surface of the wafer is higher than that of the average portion 12 of the polishing rate curve therein is exhibited, and a portion in which a sudden change is caused due to the reaction of local deformation xe2x80x98so-calledxe2x80x99 xe2x80x9creboundxe2x80x9d exhibits a portion 94 of a low value of the polishing rate curve. The minimum relative polishing rate of the portion 94 of a low value of the polishing rate curve is within a range about 0.8 to 0.5, and the position of the wafer diameter appears within a range about xe2x88x9275 to xe2x88x9295 mm. As a result, the polishing properties in the vicinity of the outer circumferential portion of the wafer became non-uniform, causing edge sagging phenomenon due to excessive polishing.
FIG. 8-b shows the case where the outer circumferential end portion 90 of the wafer has been deformed in such a way that it is lifted up from the surface of the grindstone, in which the relative polishing rate of the portion 95 of the polishing rate curve is lower than that of the average portion 12 of the polishing rate curve on the surface of the wafer, a portion in which a sudden change is caused due to the reaction of local deformation xe2x80x98so-calledxe2x80x99 xe2x80x9creboundxe2x80x9d exhibits a portion 97 of a high value of the polishing rate curve. The maximum relative polishing rate of the portion 97 of a high value of the polishing rate curve is within a range about 1.2 to 2.0, and the position of the wafer diameter appears within a range about xe2x88x9275 to xe2x88x9295 mm. As a result, the polishing properties in the vicinity of the outer circumferential portion of the wafer became non-uniform, causing edge sagging phenomenon due to the shortage of polishing.
An object of the present invention is to provide a method: for dissolving a polishing and processing characteristic of an outer circumferential surface area of a substrate becoming non-uniform, that is, the edge sagging phenomenon by which the substrate is pushed and deformed by a guide of a carrier caused by thrust which is generated by processing load and friction and is applied in the direction of the surface of the substrate; and for controlling the polishing and processing characteristic including the outer circumferential area of the substrate.
Another object of the present invention is to provide a method for manufacturing a semiconductor device that can improve throughput, by planarizing the protruded portions of the circuit pattern formed on the surface of the semiconductor substrate, and by reducing or preventing the polishing of the recessed portions so as to reduce the polishing time.
A still another object of the present invention is to provide a method for manufacturing a semiconductor device that can reduce or eliminate the occurrence of non-uniform thickness of the thin film formed on the surface of the wafer by planarizing the protruded portions of the thin film formed on the surface of the semiconductor substrate, and by reducing or preventing the polishing of the recessed portions.
According to an embodiment of the present invention, the above objects can be achieved by polishing the thin film formed on the surface of a semiconductor substrate so as to disperse the reaction force generated when the substrate is pushed against a guide provided around the substrate, while holding the back surface of the substrate having the thin film on the surface thereof with a carrier; or by polishing the thin film so as to hold the semiconductor substrate with the guide having an elastic body on the inner wall thereof, provided around the substrate, while holding the back surface of the substrate having the thin film on the surface thereof; or by polishing the thin film so as to minimize deformation in the vertical direction when a substrate having the thin film on the surface is pushed against a guide having a recessed groove on the inner wall thereof, provided around the substrate, and the outer edge of the substrate is fixed by the depressed groove.
The polishing friction force, determined by the product of the polishing load to push the substrate against a polishing member from the back surface of the substrate and the friction coefficient between the polishing member and the thin film on the surface of the substrate, can be put in another way, under the relationship determined by the sum of the holding force on the substrate determined by the product of the polishing load and the friction coefficient between the back surface of the substrate and the elastic member of the carrier and the reaction force from a guide pushed by and contacted with the outer circumstance of the substrate,
(polishing friction force)=(polishing load)xc3x97(friction coefficient between polishing member and thin film on substrate),
(substrate holding force)=(polishing load)xc3x97(friction coefficient between elastic member of carrier and back surface of substrate),
(polishing friction force)=(substrate holding force)+(reaction force from guide to substrate), or
(reaction force from guide to substrate)=(polishing friction force)xe2x88x92(substrate holding force).
As a result, polishing and processing are uniformly executed up to the outer circumferential end, and thereby it becomes possible to manufacture a semiconductor device without causing any edge sagging phenomenon.
Furthermore, since the reaction force from the guide to the substrate can be reduced by increasing the holding force on the substrate, the local deformation of the outer circumferential end of the substrate can be prevented. As a result, since the local deformation of the outer circumferential area of the substrate can be prevented, the substrate can be polished uniformly up to the outer circumferential end of the substrate, and a semiconductor device without causing edge sagging phenomenon can be manufactured.
Also, since the polishing conditions can be controlled by restricting the height of the outer circumferential end of the substrate with the groove on the inner wall of the guide, the uniformity of polishing is further improved up to the outer circumferential area of the substrate. As a result, the substrate can be polished uniformly up to the outer circumferential end of the substrate, and a semiconductor device without causing edge sagging phenomenon can be manufactured.
Since the upper and lower surfaces of the groove on the inner wall of the guide contact with the arced inclined surface on the outer circumstance of the substrate so as to sandwich the edge of the substrate, by restricting the height of the outer circumferential end of the substrate with the groove on the inner wall of the guide, an action is served to further increase the effective contact area, so that the concentration of the reaction force from the guide to the substrate is diffused and relaxed to enable the prevention of the local deformation of the outer circumferential end the of substrate, the substrate can be polished uniformly up to the outer circumferential end of the substrate, and a semiconductor device without causing edge sagging phenomenon can be manufactured.
In the method for manufacturing a semiconductor device with the chemical mechanical polishing method using a grindstone, that is a fixed grinding disc, the inventors of the present invention experimentally have found for the first time the phenomenon in which a substrate as thin as about not more than 1 mm deforms locally when the substrate is pushed against the guide of a carrier by the thrust generated due to the polishing load and friction applied in the direction of the substrate surface, although the polishing member that has a high rigidity, such as a grindstone, is not deformed by the pushing load of the substrate, as described in the prior art technique indicated by FIGS. 7 and 8. The inventors clarified that this phenomenon makes the polishing properties for the outer circumferential surface of the substrate non-uniform, and caused so-called edge sagging phenomenon.
The present invention was devised based on the above-described findings.
The residual film as described herein is the thickness of the film after polishing the portions of the same level of the pattern which is arranged and formed in a scattered manner on a semiconductor substrate, that is, the distance between the surface of the thin film and the surface of the substrate.
Therefore, the thickness non-uniformity of the remaining film is expressed by abbreviating the remaining film of any point P within the substrate surface, the polishing rate, and the polished quantity to (Remaining film P), (Polishing rate P) and (Polishing quantity P), respectively, in the following equations:
(Remaining film)=(Film thickness after polishing)=(Film thickness before polishing)xe2x88x92(Polished quantity)
therefore,
(Remaining film P)=(Film thickness before polishing)xe2x88x92(Polished quantity P)=(Film thickness before polishing)xe2x88x92(Polishing rate P)xc3x97(Polishing time)
(Thickness non-uniformity of remaining film) =(Remaining film P1)xe2x88x92(Remaining film P2)={(Polishing rate P2)xe2x88x92(Polishing rate P1)}xc3x97(Polishing time)=(Difference in polishing rate)xc3x97(Polishing time)
This difference in polishing rate between point P1 and point P2 is caused by the variation and non-uniformity of the polishing rate within the substrate surface.